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procesor INTEL PENTIUM B830 1.80GHZ ,socket G2 rPGA988b model SR0HR . FUNCTIONAL

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Specificatii

procesor INTEL PENTIUM B830 1.80GHZ ,socket G2 rPGA988b model SR0HR . FUNCTIONAL

testat , in stare buna

General information
Type CPU / Microprocessor
Family Intel Mobile Celeron Dual-Core
Processor number  ?  B830
Part number FF8062700848702
Frequency (GHz)  ?  1.8
Clock multiplier  ?  18
Package type 988-pin micro-FCPGA
Socket type Socket G2 (rPGA988B)
Architecture / Microarchitecture / Other
CPUID 0206A7h
Core stepping Q0
Processor core Sandy Bridge
Manufacturing technology (micron) 0.032
Number of cores 2
L2 cache size (KB)  ?  512
L3 cache size (MB) 2
Features EM64T technology  ? 
Enhanced SpeedStep technology  ? 
Execute disable bit  ? 
MMX
SSE
SSE2
SSE3
SSE4
SSSE3
Virtualization technology (VT-x)
Case temperature (°C)  ?  100
Thermal Design Power (Watt)  ?  35
Notes on sSpec SR0HR
  • The part supports DDR3-1066 and DDR3-1333 memory.
  • Direct Memory Interface speed is 5 GT/s.
  • Frequency of integrated graphics controller in turbo mode is 1050 MHz.
  • Integrated graphics controller runs at 650 MHz.
  • The OEM/tray part is discontinued. Last order date for OEM processors is February 21, 2014. Last shipment date for OEM processors is August 8, 2014.

Related S-Spec numbers

In addition to the SR0HR S-Spec, this processor was also manufactured with one pre-production S-Spec number:

Stepping S-Spec FF8062700848702
Q0 QBKF +
SR0HR +

NOTE: Engineering and qualifications samples are marked with this color


SR0HR CPUID information

Intel Mobile Celeron Dual-Core B830 SR0HR
Part number: FF8062700848702
Measured Frequency: 1800 MHz
Comment:
Submitted by: CPU-World
 
General information
Vendor: GenuineIntel
Processor name (BIOS): Intel(R) Celeron(R) CPU B830 @ 1.80GHz
Cores: 2
Logical processors: 2
Processor type: Original OEM Processor
CPUID signature: 206A7
Family: 6 (06h)
Model: 42 (02Ah)
Stepping: 7 (07h)
TLB/Cache details: 64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way set associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L2 TLB: 1-MB, 4-way set associative, 64-byte line size
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries

Cache details
Cache: L1 data L1 instruction L2 L3
Size: 2 x 32 KB 2 x 32 KB 2 x 256 KB 2 MB
Associativity: 8-way set
associative		 8-way set
associative		 8-way set
associative		 8-way set
associative
Line size: 64 bytes 64 bytes 64 bytes 64 bytes
Comments: Direct-mapped Direct-mapped Non-inclusive
Direct-mapped		 Inclusive
Shared between all cores

Supported instructions
Instruction set extensions Additional instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
SSE4.1 MONITOR/MWAIT
SSE4.2 PCLMULDQ
  POPCNT
  RDTSCP
  SYSENTER/SYSEXIT
  XSAVE/XRESTORE states

Integrated features and technologies
Major features Other features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Intel Virtualization CPL qualified debug store
Enhanced SpeedStep Clock modulation duty cycle extension
  Debug store
  Debugging extensions
  Digital Thermal Sensor capability
  Extended xAPIC support
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Package thermal management
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Power Limit Notification capability
  Process context identifiers
  Self-snoop
  TSC rate is ensured to be invariant across all states
  Thermal monitor
  Thermal monitor 2
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Timestamp counter deadline
  Virtual 8086-mode enhancements
  xTPR Update Control

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